Method for description of incompletely specified (partial) Boolean functions in VHDL is proposed. Examples of synthesized VHDL models of partial Boolean functions are presented; and the results of experiments on circuit implementation of VHDL descriptions of systems of partial functions. The realizability of original partial functions in logical circuits was verified by formal verification. The results of the experiments show that the preliminary minimization in DNF class and in the class of BDD representations for pseudo-random systems of completely specified functions does not improve practically (and in the case of BDD sometimes worsens) the results of the subsequent synthesis in the basis of FPGA unlike the significant efficiency of these procedures for the synthesis of benchmark circuits taken from the practice of the design.

The influence of procedures of technology independent optimization of functional descriptions on complexity and delay of circuits made of CMOS VLSI library elements is investigated. The effectiveness of the optimization methods implemented in the synthesizer LeonardoSpectrum, the methods of minimization of Boolean functions systems in DNF and algebraic decomposition was compared. Experimental analysis was shown that sequential fulfilment of procedures of minimization of Boolean functions systems and algebraic decomposition during the technology independent optimization stage results in the great reduction of the circuit complexity and delay.

We develop two methods of solving DBM system. One method is based on Fourier – Motskin
elimination scheme, it has complexity O(n3) for finding initial solve and complexity O(n3) for finding solve by changing one of variable value for some cases. The other method is based on the network of constraints approach, it has complexity O(n3) for finding initial solve and  O(n) or approximately for finding solve by changing one of variable value if it is limited by special bounds.

We consider a scheduling problem with two parallel machines to minimize the sum of total weighted completion time and total machine time slot costs. In the case of the constant or linear decreasing sequences of time slotcosts we suggest an exact pseudopolynomial DP algorithm.

One of the possible ways to reorganize of graphical information describing the set of topology layers of modern VLSI. The method is directed on the use in the conditions of the bounded size of video card memory. An additional effect, providing high performance of forming multi- image layout a multi-layer topology of modern VLSI, is achieved by preloading the required texture by means of auxiliary background process.

The Mixed Integer Programming Class Library (MIPCL) is a free software designed for implementing mixed integer programming models quickly, easily, and efficiently. Computational experiments show that currently MIPCL is one of the best noncommercial mixed-integer programming solvers. MIPCL libraries, documentation and examples are provided under the terms of the GNU Lesser Public License. Therefore, MIPCL is equally freely available for noncommercial and commercial use.

The problem of recursive (algorithmic) representation is considered for the complexity class NPcoNP. A new method is proposed for algorithmically enumerating all problems in NPcoNP, using polynomial-time nondeterministic Turing machines.

The paper represents the task of simulation of the control system dynamics in the rotor flux oriented vector control system of the induction motor with application of the mathematical model in the form of the extended root locus. An algorithm for control system parameters calculation has been proposed, ensuring stability and required quality when operating in conditions of the plant parametric uncertainty.

The problem of race free state-assignment of an asynchronous automaton minimizing the switching activity of memory elements in an implementing circuit is considered. A heuristic method to solve this problem for an asynchronous automaton is suggested where the critical races between memory elements of the implementing circuit are eliminated.

Mathematical model of the process of retelling the content of the test messages by the convergence of communicative fragments is proposed. Formally defined concepts such fragments, as well as the verbal-associative networks as models of domain knowledge and retell the texts. Algorithm description of the content of the text presented.

We propose a method of normalization in thickness of the double-ended contour lines based on the analysis of local orientations of fragments for binary images. Comparison of the proposed method with known methods of thinning is held. It is shown that the proposed method is superior to the known methods of thinning on speed and quality.

The least-square methodology is given consider adaptive filtering for multisensory measurements
in case of uncertain prior knowledge about signal models and measurement noise parameters. The accuracy comparison with Kalman filtering is presented.

The method of forming a common secret binary sequence between using an open communication channel is considered. The method is not based on common unidirectional functions and results in iterative elimination of distinct bits in the initial binary sequences with a certain percentage of mismatches, intentionally made by subscribers themselves. The cryptanalysis technique of this method based on the use of the deviation of aprior distribution of probabilities of inverting bits in the original binary sequences of subscribers from uniform distribution is proposed. Part of the bits in the final secret sequence can be identified accurately enough.

The paper presents existing active hardware metering approaches. The motivation of using active metering approaches by fabless integrated circuits design companies is given. The finite state machine based and asymmetrical cryptography based methods are presented. The advantages and disadvantages of existing active metering approaches are analyzed. The potential solution for modern technique issues are proposed.