INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING

Abstract

The question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals. To solve this problem we use a model based on representation of combinational circuit as a directed graph. In the process of solving this problem, the frequency of incoming signals is established. This frequency must be as high as possible.