1. Barzilai, Z. Exhaustive Generation of Bit Pattern with Application to VLSI Self-Testing / Z. Barzilai, D. Coppersmith, A. Rozenberg // IEEE Transactions on Computers. - 1983. - Vol. C-31, no. 2. - P. 190-194.
2. Das, D. Exhaustive and Near-Exhaustive Memory Testing Techniques and their BIST Implementations / D. Das, M. G. Karpovsky // Journal of Electronic Testing. − 1997. - Vol. 10. − P. 215−229.
3. Ярмолик, В. Н. Псевдоисчерпывающее тестирование ОЗУ / В. Н. Ярмолик, И. Мрозек, В. А. Леванцевич // Информатика. - 2017. - № 2(54). - С. 58-69.
4. Ярмолик, С. В. Итеративные почти псевдоисчерпывающие вероятностные тесты / С. В. Ярмолик, В. Н. Ярмолик // Информатика. - 2010. - № 2(26). − С. 66−75.
5. Mrozek, I. Method for Generation Multiple Controlled Random Tests / I. Mrozek, V. Yarmolik // Proc. of the Computer Information Systems and Industrial Management (CISIM 2016), 14-16 September 2016. - Vilnius, Lithuania, 2016. - P. 429-440.
6. Mrozek, I. Iterative Antirandom Testing / I. Mrozek, V. Yarmolik // Journal of Electronic Testing: Theory and Applications (JETTA). - 2012. - Vol. 9, no. 3. - P. 251-266.
7. Yarmolik, S. V. The Syntheses of Probability Tests with a Small Number of Kits / S. V. Yarmolik, V. N. Yarmolik // Automatic Control and Computer Science. - 2011. − Vol. 45, no. 3. − P. 133−141.
8. Yarmolik, V. N. Address Sequences for Multiple Run March Tests / V. N. Yarmolik, S. V. Yarmolik // Automatic Control and Computer Sciences. - 2006. - No. 5. - С. 59-68.
9. Mrozek, I. Antirandom Test Vectors for Bist in Hardware/Software Systems / I. Mrozek, V. N. Yarmolik // Fundamenta Informaticae. - 2012. - No. 119. - P. 1-23.
10. Ярмолик, C. В. Многократные неразрушающие маршевые тесты с изменяемыми адресными последовательностями / С. В. Ярмолик, В. Н. Ярмолик // Автоматика и телемеханика. - 2007. - № 4. - С. 126-137.
11. Goor, A. J. Testing Semiconductor Memories, Theory and Practice / A. J. Goor. - Chichester, UK : John Wiley & Sons, 1991. - 536 p.
12. Niggemeyer, D. Integration of Non-classical Faults in Standard March Tests / D. Niggemeyer, M. Redeker, J. Otterstedt // Records of the IEEE Intern. Workshop on Memory Technology, Design and Testing, 24-25 August 1998. - Washington, DC, USA, 1998. - P. 91-98.
13. Mrozek, I. Optimal Backgrounds Selection for Multi Run Memory Testing / I. Mrozek, V. N. Yarmolik // Proc. of the 11th IEEE Workshop on Design and Diagnostic Circuits and Systems (DDECS 2008). - Bratislava, Slovakia, 2008. - P. 1-7.
14. Karpovsky, M. G. Transparent Random Access Memory Testing for Pattern Sensitive Faults / M. G. Karpovsky, V. N. Yarmolik // J. Electron. Testing: Theory and Applications (JETTA). - 1994. - Vol. 5, no. 1. - P. 91-113.
15. Karpovsky, M. G. Transparent Memory Testing for Pattern Sensitive Faults / M. G. Karpovsky, V. N. Yarmolik // Proc. Intern. Test Conf. IEEE Publisher. - Washington, DC, USA, 1994. - P. 860-869.
16. Flajolet, P. Birthday Paradox, Coupon Collectors, Caching Algorithms and Self-Organizing Search / P. Flajolet, D. Gardy, L. Thimonier // Discrete Appl. Math. - 1992. - No. 39. - P. 207-229.
Послать статью по эл. почте 