SYNTHESIS OF FPGA ARCHITECTURES OF BLOCK LIFTING-BASED FILTER BANKS IN QUATERNION ALGEBRA (PART 1)
Abstract
Nowadays the methodology for designing systems on a chip is based on highly parameterized IP components which provide a wide range of adjustment of costs in resources, fixed point arithmetic data formats and system performance for a specific target application. The article presents a systematic approach for synthesizing FPGA architectures of integer reversible paraunitary filter banks in quaternion algebra (Int-Q-PUBB) for L2L (lossless-to-lossy) image transformed encoding. It is shown that the basic elementary transformation of the filter bank is the operation of quaternion multiplication (Q-MUL), the block-lifting factorization of which and the distributed arithmetic on the adder are the basis of the parametrizable Q-MUL IP-component.
About the Authors
E. V. Rybenkov
Belarusian State University of Informatics and Radioelectronics, Minsk
Belarus
Assistant Professor, Department of Computer Engineering
Belarus
Assistant Professor, Department of Computer Engineering
N. A. Petrovsky
Belarusian State University of Informatics and Radioelectronics, Minsk
Belarus
Associate Professor, Ph. D. (Computer Science), Department of Computer Engineering
Belarus
Associate Professor, Ph. D. (Computer Science), Department of Computer Engineering
References
1. Rao K., Hwang J. Techniques and Standards for Image, Video, and Audio Coding. Prentice Hall, 1996, 563 p.
2. Vaidyanathan P. P. Multirate Systems and Filter Banks. Englewood Cliffs, NJ, Prentice Hall, 1993, 911 p.
3. Krot A. M., Kudrjavcev V. O. Teorija analiza i sinteza bjenk-fil'trov i ih primenenie [Theory of analysis and synthesis filter banks and their application]. Uspehi sovremennoj radiojelektroniki [The Successes of Modern Radio Electronics], 1999, no. 2, pр. 3–17 (in Russian).
4. Suzuki T., Tanaka Y., Ikehara M. Lifting-based paraunitary filterbanks for lossy/lossless image coding. Proc. of Intern. Conf. EUSIPCO. Florence, 2006, vol. 6.
5. Pennebaker W. B., Mitchell J. L. JPEG: Still Image Compression Standard. N. Y., Van Nostrand Reinhold, 1993, 639 p.
6. Taubman D., Marcellin M. JPEG2000: Image Compression Fundamentals, Standards, and Practice. Boston, Kluwer Academic Publishers, 2002, 777 p. doi: 10.1007/978-1-4615-0799-4
7. ISO/IEC 29199-2:2012. Information technology – JPEG XR image coding system. – Part 2: Image coding specification. – 2012.
8. Chen Y. J., Oraintara S., Nguyen T. Integer discrete cosine transform (IntDCT). Proc. of 2nd Intern. Conf. ICICS. Sydney, 1999, vol. 99.
9. Liang J., Tran T. D. Fast multiplierless approximations of the DCT with the lifting scheme. IEEE Trans. Signal Process, 2001, vol. 49, no. 12, pр. 3032–3044. doi: 10.1109/78.969511
10. Petrovsky A., Rodionov M., Petrovsky Al. Dynamic reconfigurable on the lifting steps wavelet packet processor with frame-based psychoacoustic optimized time-frequency tiling for real-time audio applications. Design and Architectures for Digital Signal Processing. Vienna, InTech, 2013, рр. 3–30. doi: 10.5772/51604
11. Oraintara S., Tran T. D., Heller P. N., Nguyen T. Q. Lattice structure for regular paraunitary linear-phase filterbanks and m-band orthogonal symmetric wavelets. IEEE Trans. Signal Process, 2001, vol. 49, no. 11, рр. 2659–2672. doi: 10.1109/78.960413
12. Gan L., Ma K.-K. A simplified lattice factorization for linear-phase paraunitary filter banks with pairwise mirror image frequency responses. IEEE Trans. Circuits Syst. II, 2004, vol. 51, no. 1, рр. 3–7. doi: 10.1109/TCSII.2003.821515
13. Choukroun D., Bar-Itzhack I., Oshman Y. Novel quaternion Kalman filter. IEEE Trans. Aerosp. Electron. Syst., 2006, vol. 42, no. 1, рр. 174–190. doi: 10.1109/TAES.2006.1603413
14. Miron S., Bihan Le N., Mars J. Quaternion-MUSIC for vector-sensor array processing. IEEE Trans. Signal Process, 2006, vol. 54, no. 4, рр. 1218–1229. doi: 10.1109/TSP.2006.870630
15. Parfieniuk M., Petrovsky A. Quaternionic building block for paraunitary filter banks. Proc. of the 12th European Signal Processing Conf. (EUSIPCO). Austria, Vienna, 2004, рр. 1237–1240.
16. Parfieniuk M., Petrovsky A. Paraunitarnye banki fil'trov na osnove algebry kvaternionov: teorija i primenenie [Quaternion based paraunitary filter banks: theory and applications]. Cifrovaja obrabotka signalov [Journal of Digital Signal Processing], 2008, no. 1, рр. 22–36 (in Russian).
17. Karney C. Quaternions in molecular modeling. J. Molecular Graphics and Modelling, 2007, vol. 25, no. 5, рр. 595–604.
18. Kantor I. L., Solodovnikov A. S. Giperkompleksnye chisla. Hypercomplex Algebra. Moscow, Science Publ., 1973, 145 p. (in Russian).
19. Baker H. G. Quaternions and orthogonal 4×4 real matrices, 1996. Available at: http://archive. gamedev.net/archive/reference/articles/article428.html (accessed 05.04.2018).
20. Parfieniuk M., Petrovsky A. Inherently lossless structures for eight- and sixchannel linear-phase paraunitary filter banks based on quaternion multipliers. Signal Process. 2010, vol. 90, рр. 1755–1767. doi: 10.1016/j.sigpro.2010.01.008
21. Gan L., Ma K.-K. A simplified lattice factorization for linear-phase perfect reconstruction filter bank. IEEE Signal Process. Lett, 2001, vol. 8, no. 7, рр. 207–209. doi: 10.1109/97.928679
22. Petrovsky N., Stankevich A., Petrovsky A. Low read-only memory distributed arithmetic implementation of quaternion multiplier using split matrix approach. Electronics Letters, 2014, vol. 50, no. 24, рр. 1809–1811. doi:10.1049/el.2014.1775
23. Petrovsky N. A., Stankevich A. V., Petrovsky A. A. CORDIC-tehnika dlja fiksirovannogo ugla vrashhenija v operacii umnozhenija kvaternionov [CORDIC-techniques for fixed angle of rotation in multiplying operation of quaternions]. Informatika [Informatics], 2015, no. 4(48), рр. 85–108 (in Russian).
24. Bibilo P. N. Osnovy jazyka VHDL: uchebnoe posobie. Izd. 6-e. Fundamentals of VHDL: Textbook. Ed. 6th. Moscow, Knizhnyj dom «Librokom» Publ., 2014, 328 p. (in Russian).
25. Bartholoma R., Greiner T., Kesel F., Rosenstiel W. A systematic approach for synthesizing VLSI architectures of lifting-based filter banks and transforms. IEEE Trans. Circuits Syst. I, 2008, vol. 55, no. 7, рр. 1939–1952.
26. The complexity of the quaternion product : Rep. TR 75-245 / Cornell University. – 1975. Available at: http://www.theworld.com/~sweetser/quaternions/ps/cornellcstr75-245.pdf (accessed 05.04.2018).
27. Parfieniuk M., Petrovsky A. Quaternion multiplier inspired by the lifting implementation of plane rotations. IEEE Trans. Circuits Syst. I, 2010, vol. 57, no. 10, рр. 2708–2717. doi: 10.1109/TCSI.2010.2046259
28. Petrovsky N. A., Rybenkov E. V., Petrovsky A. A. Design and implementation of reversible integer quaternionic paraunitary filter banks on adder-based distributed arithmetic. Signal Processing: Algorithms, Architectures, Arrangements, and Applications (SPA 2017). Poznan, 2017, рр. 17–22. doi: 10.23919/SPA.2017.8166830
29. Chang T. S., Chen C., Jen C. W. New distributed arithmetic algorithm and its application to IDCT. IEE Proceedings – Circuits, Devices and Systems, 1999, vol. 146, no. 4, рр. 159–163. doi: 10.1049/ip-cds:19990537
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For citations:
Rybenkov E.V., Petrovsky N.A. SYNTHESIS OF FPGA ARCHITECTURES OF BLOCK LIFTING-BASED FILTER BANKS IN QUATERNION ALGEBRA (PART 1). Informatics. 2018;15(2):29-44. (In Russ.)
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