TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS

L. D. Cheremisinova

TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS

L. D. Cheremisinova

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Abstract

The article reflects the problem of the average power estimation which is consumed by a CMOS circuit by means of its simulation on the test sequence of input actions. The method of forming test sequences of complete enumeration for sequential circuits is offered. The method is based on arcs traversal of the line digraph corresponding to the state transition graph of finite state machine representing the sequential circuit.

References

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For citations:

Cheremisinova L.D. TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS. Informatics. 2017;(4(56)):104-110. (In Russ.)

This work is licensed under a Creative Commons Attribution 4.0 License.

ISSN 1816-0301 (Print)
ISSN 2617-6963 (Online)

Informatics

TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS

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Abstract

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Informatics

TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS

Full Text:

Abstract

About the Author

References

Review

For citations:

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