TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS
Abstract
The article reflects the problem of the average power estimation which is consumed by a CMOS circuit by means of its simulation on the test sequence of input actions. The method of forming test sequences of complete enumeration for sequential circuits is offered. The method is based on arcs traversal of the line digraph corresponding to the state transition graph of finite state machine representing the sequential circuit.
About the Author
L. D. Cheremisinova
United Institute of Informatics Problems, National Academy of Sciences of Belarus
Belarus
Belarus
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Review
For citations:
Cheremisinova L.D. TESTS GENERATION FOR POWER CONSUMPTION ESTIMATION OF SEQUENTIAL CIRCUITS. Informatics. 2017;(4(56)):104-110. (In Russ.)
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