
A peer-reviewed scientific journal “Informatics” has been published four times a yearsince 2004. The journal is included in the list of scientific editions publishing the results of thesis research of the Higher Attestation Commission of the Republic of Belarus. It is also included in the Science Index scientometric database. Since December 2017 it has been included in the database of Russian Science Citation Index.
The activity of the "Informatics" journal aims to develop international scientific cooperation in the field of information technologies.
The target audience is local and foreign authors, information technology specialists and young scientists.
The journal publishes original and review articles on the results of fundamental and applied research of academic and university specialists in the field of computer science and information technologies. The main goal of the journal is to publish the most significant new results in this field .
Articles, presenting the final results of scientific projects and thesis research, opening new areas of research at the intersection of computer science and other sciences, are welcome.
All materials submitted to the editorial office of the journal are reviewed. Articles are published in Russian, Belarusian and English.
Current issue
LOGICAL DESIGN
Objectives. The problem of constructing controlled random tests with a fixed minimum Hamming distance is solved. The limitations of classical approaches to generating test patterns based on enumeration of test pattern candidates are shown. With an increase in the threshold values of the difference measures of binary test patterns, the computational complexity of constructing such tests increases. The main goal of this article is to develop methods for constructing tests based on initial templates and rules for expanding them to the required bit size.
Methods. Based on the Hamming distance used in the theory and practice of forming controlled random tests, new measures of difference are considered for comparing two binary test patterns. The basis of the proposed measures of difference is the formation of a set of Hamming distances for the original patterns, represented as sequences of symbols of different alphabets.
Results. The paper demonstrates the indistinguishability of pairs of binary test patterns using a difference measure based on the Hamming distance. In this case, different pairs of patterns may have coinciding Hamming distance values. New measures of difference for binary test sequences based on their representation as sequences consisting of symbols of different alphabets are considered. As an alternative to known solutions, an approach is proposed based on increasing the number of test patterns in a test while maintaining the minimum Hamming distance between patterns at an acceptable level. The main feature of the proposed approach is the use of the difference measure proposed by the authors based on determining the Hamming distance for test patterns consisting of symbols of different alphabets. It is shown that achieving the maximum Hamming distance value for patterns represented by a large number of binary symbols ensures the same distance value for the case when the symbols are specified by a smaller number of bits. This allows one to construct controlled random tests without the procedure of listing candidates for test patterns.
Conclusion. The considered measures of difference expand the possibilities of generating test patterns when forming controlled random tests. It is shown that the use of various templates and rules applied to them allows constructing tests with a fixed minimum Hamming distance and the required bit size of test patterns.
Objectives. The problem of reverse engineering of a transistor level circuit specified in the SPICE format in a different technological basis is considered. The goal of the work is to develop an approach to redesigning circuits using open source design automation software packages.
Methods. A method is proposed based on extracting the structure at the level of logical elements from a flat SPICE description of a transistor circuit and exporting the resulting hierarchical SPICE description to the software environment of the open synthesis package Yosys. The purpose of the export is to transform the description of the logical network in the SPICE format into descriptions in the input languages of design automation systems, as well as to perform optimization and synthesis operations in the Yosys environment.
Results. To export a logical network specified in the SPICE format to the core of the Yosys package, a program in C++ was developed using the classes of the Yosys package. The program accepts and processes the hierarchical SPICE description of the logical network, translating it into a representation in the internal format of the Yosys tool.
Conclusion. The developed program is designed as a Yosys program module and integrated into its environment as one of its commands. All the transformations available in Yosys can be performed on the logical network structure obtained by the module.
Objectives. The problems of minimizing the number of cofactors (subfunctions) of the Shannon expansions located at the same level of the BDD, representing a system of incompletely defined (partial) Boolean functions, are considered. To reduce the number of functions, it is proposed to find a subset of such functions that can be expressed as algebraic decompositions of disjunctions or conjunctions of other predefined partial functions, while the directed graph of function occurrences in decompositions should not contain contours.
Methods. Finding disjunctive and conjunctive decompositions requires searching for appropriate additional definitions of partial functions. Finding the largest number of separate algebraic decompositions reduces to the problem of finding a weighted row cover of a Boolean matrix of occurrences of system functions in separate decompositions. The task of finding consistent predefinitions of partial functions for various types of joint decompositions is reduced to the formulation and solution of logical equations.
Results. It is shown that the constructed logical equations can be easily transformed to a conjunctive normal form (CNF), and finding the roots of such equations is reduced to the problem of satisfiability of a Boolean formula presented in the form of CNF, for which effective methods and programs are known.
Conclusion. The proposed algorithms can be generalized to other types of algebraic decompositions, when, in addition to the logical operations of disjunction and conjunction, negations of these operations can be used. The application of the proposed algorithms and already known algorithms for minimizing multilevel BDD representations of partial function systems allows us to obtain the best results of technologically independent logical optimization, the initial stage of logic circuit synthesis.
SIGNAL, IMAGE, SPEECH, TEXT PROCESSING AND PATTERN RECOGNITION
Objectives. The article presents the results of calculation and comparative analysis of the characteristics of the algorithm proposed by the authors in [1] for tracking an object captured by a video camera, when solving the urgent task of automatic detection and tracking of drones. Two algorithms were selected for comparative analysis, one of which is the currently known open source ByteTrack tracker, and the other is a simple tracker based on the use of the neural network, correlation comparison together with Kalman filter. The first tracker was chosen because it can be implemented in C++ without using third-party libraries and frameworks and used on small computers in real time. The second tracker was used to determine how much better new trackers are than simple, long-used ones. The specificity of the used algorithms is automatic detection and capture of the drone, its further reliable tracking, quick repeated capture in case of tracking failure, capture of another drone when the tracked object disappears. In the used trackers, drone detection in video frames is carried out using a neural network detector, and tracking is done with the help of the neural network detector and developed tracking algorithms.
Methods. To perform a comparative analysis of object tracking algorithms, two datasets consisting of video frames that contain drone images were created and labeled. The training dataset consists of 36895 frames whereas testing one contains 8678 images. The videos of the training and test datasets were shot with different cameras in different conditions. To train the neural network part of the trackers, versions of the algorithms were written in the Python programming language, and to calculate and analyze characteristics in conditions close to real ones, in C++, which required converting the trained network using the TensorRT framework. Software tools for gathering and processing experimental data were also implemented.
Results. The comparative analysis of three object tracking algorithms allowed us to calculate and compare the characteristics of these trackers, as well as draw conclusions about the method of training the used neural network detector; about the possibility of using trackers in real time on budget personal computers with budget video cards that have the CUDA software and hardware architecture, about the applicability of two of them for solving the problem of practical tracking of drones observed by video cameras with sufficient accuracy and reliability. Of the three tested algorithms the tracker previously developed by the authors has the best characteristics.
Conclusion. The comparative analysis of the above-mentioned trackers showed the possibility of practical application of the tracker and the ByteTrack algorithm for solving the problem of tracking drones, however, there is still a problem with detecting small-sized unmanned aerial vehicles.
INFORMATION PROTECTION AND SYSTEM RELIABILITY
Objectives. Design and implementation features of a Physically Unclonable Function (PUF) based on a Configurable Ring Oscillator (CRO) on FPGA platforms are examined. The study aims to evaluate the key parameters of CRO circuits and the characteristics of CRO-based PUFs under various simulation scenarios and placement configurations on FPGA dies.
Methods. Methods of synthesis and analysis of digital devices are employed, including those based on programmable logic integrated circuits, as well as the fundamentals of digital circuit design.
Results. A generalized model of a PUF based on the comparison of signal propagation delays along a pair of symmetric paths is proposed. The model includes four main stages: Generate – generating a set of symmetric paths, Select/Switch – selecting a pair of paths from the set, Measure – measuring the signal propagation delay for each selected path, and Compute – calculating the binary PUF response based on the sign of the difference between the measured delays. This model is applicable to classical PUF types such as Arbiter PUFs and Ring Oscillator PUFs, as well as their modifications. Based on the proposed model, a CRO PUF was designed and implemented on Xilinx ZYNQ 7000 FPGA devices. Experiments were conducted on both simulated models and implemented circuits to evaluate the key timing parameters of CROs and the characteristics of CRO PUFs under various simulation scenarios and two types of component placement on FPGA dies. The results demonstrated that the majority of the signal propagation delay along the selected path is determined by the delay in FPGA configurable interconnects. Regardless of the type of component placement used, this leads to the realization of predominantly asymmetric paths. The asymmetry in paths negatively impacts one of the most critical characteristics of PUFs – intra-chip uniqueness. Low intra-chip uniqueness can impose significant limitations when implementing unclonable identification schemes. However, other PUF characteristics, such as uniformity, stability, reliability, and inter-chip uniqueness, exhibited acceptably high-performance levels.
Conclusion. The conducted parametric simulation of CRO PUF circuits demonstrated its effectiveness in evaluating key PUF characteristics, such as uniformity and intra-chip uniqueness. This approach can be utilized by developers for rapid assessment of circuit quality without requiring physical implementation. Achieving acceptable inter-chip uniqueness values necessitates the development of new circuit design solutions that enable the generation of multiple symmetric paths on FPGA devices. Additionally, the measured periods of CRO circuits clearly demonstrate their uniqueness, both when implemented on the same chip and across different chips. This serves as a foundation for exploring new methods and algorithms for calculating unique PUF responses.
Objectives. The purpose of the research is to test the applicability of the adaptation of the modular number system using a masking transformation with a pseudo-random integer value to the original secret S in a modification of Adi Shamir’s (k, n)-threshold secret sharing scheme to reduce the complexity of calculating the basic integral characteristic to a theoretical minimum.
Methods. A modification of Adi Shamir's secret sharing scheme in a threshold cryptosystem based on modular arithmetic (MA cryptosystem) with the generation of shares of secret sharing participants in two stages is considered. Shamir’s scheme was chosen as optimal in terms of complexity, resource intensity, perfection and ideality; in addition, it is scalable – the number of participants can be increased to the order of the field p, without changing the ability to recover the secret. A masking transformation using a term with a pseudo-random integer value C for the shared secret S, the range of change of the pseudo-random parameter C agreed upon the range of changes in the values of the original signal is applied. The interval-modular form of the number of the secret value is applied too.
Results. It is shown that the use of the interval-modular form of the number S̅ – a masking transformation with a pseudo-random parameter of the number S of the original secret – reduces the complexity of calculating basic interval-index characteristics when solving threshold coding problems almost to a theoretical minimum. Adaptive coordination of changes in the pseudo-random parameter of the masking function with the domain of its results makes it possible to implement a minimally redundant modular decomposition of the masking function for any admissible basis of the based scheme.
Conclusion. The results of the presented work allow to conclude for modular threshold cryptosystems of secret sharing in distributed data processing systems that the use of a linear masking function and narrowing the range of changes in the masking analogue S̃ of the original secret S, allowing for minimally redundant coding for the selected p1, p2, …, pn, causes a significant reduction in the computational complexity of the calculated minimal-redundant modular arithmetic relations of integral characteristics within the framework of the model under study. Due to which a higher level of performance is achieved at the stage of decoding the original secret compared to other solutions.
INFORMATION
ISSN 2617-6963 (Online)