AN ALGORITHM FOR ASSEMBLING A COMMON IMAGE OF VLSI LAYOUT

Abstract

We consider problem of assembling a common image of VLSI layout. Common image is composed
of frames obtained by electron microscope photographing. Many frames require a lot of computation for positioning each frame inside the common image. Employing graphics processing units enables acceleration of computations. We realize algorithms and programs for assembling a common image of VLSI layout. Specificity of this work is to use abilities of CUDA to reduce computation time. Experimental results show efficiency of the proposed programs.