FEATURES OF OBFUSCATION OF VHDL-DESIGNS AND ITS COMPLEXITY EVALUATION METHODS
Abstract
Lexical and functional obfuscation is formalized. Brief survey of methods of lexical obfuscation is given and their drawbacks are investigated when applied to specifications in VHDL language. Complexity evaluation methods for specifications in VHDL language are considered. Complexity evaluation for different variants of VHDL specifications of a given digital device is presented.
About the Authors
V. V. Sergeichik
Белорусский государственный университет информатики и радиоэлектроники
Belarus
Belarus
A. A. Ivaniuk
Белорусский государственный университет информатики и радиоэлектроники
Belarus
Belarus
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Review
For citations:
Sergeichik V.V., Ivaniuk A.A. FEATURES OF OBFUSCATION OF VHDL-DESIGNS AND ITS COMPLEXITY EVALUATION METHODS. Informatics. 2014;(1):116-125. (In Russ.)
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