informИнформатикаInformatics1816-03012617-6963UIIP NASBinform-95Research ArticleОБРАБОТКА СИГНАЛОВ, ИЗОБРАЖЕНИЙ, РЕЧИ, ТЕКСТА И РАСПОЗНАВАНИЕ ОБРАЗОВSIGNAL, IMAGE, SPEECH, TEXT PROCESSING AND PATTERN RECOGNITIONКОНВЕЙЕРНАЯ АРХИТЕКТУРА ДЕКОДЕРА CABAC СТАНДАРТА Н.264/AVC ДЛЯ МОБИЛЬНЫХ ПРИЛОЖЕНИЙPIPELINE ARCHITECTURE OF H.264/AVC STANDARD CABAC DECODER FOR MOBILE APPLICATIONSПетровскийАл. А.PetrovskyAl. A.petrovsky@bsuir.byСтанкевичА. В.StankevichA. V.stankevich@bsuir.byПетровскийА. А.PetrovskyA. A.palex@bsuir.byБелорусский государственный университет информатики и радиоэлектроникиRussian Federation201301102016032133Copyright © Петровский А.А., Станкевич А.В., Петровский А.А., 20162016Петровский А.А., Станкевич А.В., Петровский А.А.Petrovsky A.A., Stankevich A.V., Petrovsky A.A.Данная работа распространяется под лицензией Creative Commons Attribution 4.0.This work is licensed under a Creative Commons Attribution 4.0 License.https://inf.grid.by/jour/article/view/95

Описывается архитектура декодера CABAC для мобильных приложений c разрешением до 625SD с трехступенчатым конвейером, позволяющая обеспечить декодирование одного бина за такт. Декодер совместим с профилями high profile, high 10 profile, high 4:2:2 profile, поддерживает режим MBAFF и блоки 8 ? 8, а также масштабируем как по разрешению, так и по поддерживаемым инструментам декодирования, описанным в стандарте H.264. Выполняется сравнение с известными реализациями прототипа декодера CABAC на FPGA фирмы Xilinx.

The paper describes a three-stage pipeline architecture implementation of the CABAC decoder for mobile applications, with image resolution up to 625SD. The decoder architecture is suggested for pipeline calculations with the decoding performance of one bin per clock cycle. The decoder is compatible with profiles high profile, high 10 profile and high 4:2:2 profile and supports regime MBAFF and 8×8 blocks. It is scalable both in the resolution and in the supported decoding tools described in standard H.264. A comparison of our implementation with implementations of a prototype CABAC decoder on FPGA from the company Xilinx is given.

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The authors declare that there are no conflicts of interest present.