informИнформатикаInformatics1816-03012617-6963UIIP NASBinform-426Research ArticleЛОГИЧЕСКОЕ ПРОЕКТИРОВАНИЕLOGICAL DESIGNСинтез самопроверяемых схем встроенного контроля на основе метода логического дополнения до равновесного кода «2 из 4»The self-checking integrated control circuits synthesis based on the boolean complement method to "2-out-of-4" constant-weight codehttps://orcid.org/0000-0002-4563-6411ЕфановД. В.EfanovD. V.

Ефанов Дмитрий Викторович - доктор технических наук, доцент, руководитель направления систем мониторинга и диагностики ООО «ЛокоТех-Сигнал»; профессор кафедры «Автоматика, телемеханика и связь на железнодорожном транспорте» МИИТ.

Ул. 3-я Рыбинская, 18, 107113, Москва; ул. Образцова, 9, 127994, Москва

SPIN-код: 1663-0900

Dmitry V. Efanov - Dr. Sci. (Eng.), Associate Professor, Head of the Direction of Monitoring and Diagnostic Systems at "LocoTech-Signal" LCC; Professor of "Automation, Remote Control and Communication on Railway Transport" Department RUT.

18, 3ed Rybinskaya Str., 107113, Moscow; 9, Obraztsova Str., 127994, Moscow

TrES-4b@yandex.ruСапожниковВ. В.SapozhnikovV. V.

Сапожников Валерий Владимирович - доктор технических наук, профессор, профессор кафедры «Автоматика и телемеханика на железных дорогах».

Valery V. Sapozhnikov - Dr. Sci. (Eng.), Professor, Professor of "Automation and Remote Control on Railways" Department.

9, Moscow Ave., 190031, Saint Petersburg

port.at.pgups@gmail.comСапожниковВ. В.SapozhnikovVl. V.

Сапожников Владимир Владимирович - доктор технических наук, профессор, профессор кафедры «Автоматика и телемеханика на железных дорогах».

Московский пр., 9, 190031, Санкт-Петербург

Vladimir V. Sapozhnikov - Dr. Sci. (Eng.), Professor, Professor of "Automation and Remote Control on Railways" Department.

9, Moscow Ave., 190031, Saint Petersburg

at.pgups@gmail.comПивоваровД. В.PivovarovD. V.

Пивоваров Дмитрий Вячеславович - аспирант, ассистент кафедры «Автоматика и телемеханика на железных дорогах».

Московский пр., 9, 190031, Санкт-Петербург

Dmitry V. Pivovarov - Ph. D. Student, Assistant of "Automation and Remote Control on Railways" Department.

9, Moscow Ave., 190031, Saint Petersburg

pivovarov.d.v.spb@gmail.comООО "ЛокоТех-Сигнал", Российский университет транспорта (МИИТ)"LocoTech-Signal" LCC, Russian University of TransportПетербургский государственный университет путей сообщения Императора Александра IEmperor Alexander I St. Petersburg State Transport University2018070920181547185Copyright © Ефанов Д.В., Сапожников В.В., Сапожников В.В., Пивоваров Д.В., 20182018Ефанов Д.В., Сапожников В.В., Сапожников В.В., Пивоваров Д.В.Efanov D.V., Sapozhnikov V.V., Sapozhnikov V.V., Pivovarov D.V.Данная работа распространяется под лицензией Creative Commons Attribution 4.0.This work is licensed under a Creative Commons Attribution 4.0 License.https://inf.grid.by/jour/article/view/426

Исследуются особенности синтеза самопроверяемых схем встроенного контроля по методу логического дополнения на основе равновесного кода «2 из 4». Описываются особенности реализации схем встроенного контроля по методу логического дополнения. Отмечается возможность синтеза структур дискретных устройств, имеющих меньшую структурную избыточность, чем при реализации схемы контроля по методу дублирования. Эффект в снижении структурной избыточности достигается за счет минимизации сложности технической реализации блока контрольной логики и использования более простых по своим структурам тестеров, чем компаратор в системе дублирования. Предлагается способ организации схемы встроенного контроля, основанный на доопределении значений контрольных функций с учетом обеспечения тестируемости элементов сложения по модулю два в блоке логического дополнения и тестера кода «2 из 4».

The article explores the peculiarities of self-checking integrated control circuits synthesis by the Boolean complement method based on the "2-out-of-4'' constant-weight code. The article describes the features of integrated control circuits implementation by the Boolean complement method. It is noted that it is possible to synthesize the structures of discrete devices, which have less structural redundancy than in situation of the control circuit implementation by the method of duplication. The effect in structural redundancy reducing is achieved by minimizing the complexity of the control logic block technical implementation and using checkers that are simpler in their structures than the comparator in the system of duplication. The article proposes a method of the integrated control circuit organization based on determining the values of control functions taking into account the maintenance of testability of elements of addition by modulo two in the Boolean complement block and the checker of the "2-out-of-4" code.

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The authors declare that there are no conflicts of interest present.