informИнформатикаInformatics1816-03012617-6963UIIP NASBinform-343Research ArticleЛОГИЧЕСКОЕ ПРОЕКТИРОВАНИЕLOGICAL DESIGNПРИМЕНЕНИЕ КОНФИГУРИРУЕМЫХ ГЕНЕРАТОРОВ ИМПУЛЬСОВ ДЛЯ ИДЕНТИФИКАЦИИ ПЛИСИванюкА. А.Белорусский государственный университет информатики и радиоэлектроникиBelarus20111004201804(32)113123Copyright © Иванюк А.А., 20182018Иванюк А.А.Иванюк А.А.Данная работа распространяется под лицензией Creative Commons Attribution 4.0.This work is licensed under a Creative Commons Attribution 4.0 License.https://inf.grid.by/jour/article/view/343

Рассматривается возможность применения конфигурируемых генераторов цифровых импульсов в качестве аппаратной реализации физически неклонируемых функций для решения задачидентификации программируемых логических интегральных схем (ПЛИС) типа FPGA. Приводятся и анализируются результаты экспериментальных исследований генераторов импульсов, реализованных для FPGA Xilinx SPARTAN-3E.

ReferencesFPGA Based Symmetric Multi-core Processors for Optimized Performance of H.264 Encoder / M.E. Krishnan [et al.] // Advances in Recent Technologies in Communication and Computing (ARTCom’ 10) : Proc. on IEEE Int. Conf. – Kottayam, India, 2010. – P. 235–239.FPGA Based Symmetric Multi-core Processors for Optimized Performance of H.264 Encoder / M.E. Krishnan [et al.] // Advances in Recent Technologies in Communication and Computing (ARTCom’ 10) : Proc. on IEEE Int. Conf. – Kottayam, India, 2010. – P. 235–239.Temple, K. Intel Expands Customer Choice with First Configurable Intel® Atom™-basedTemple, K. Intel Expands Customer Choice with First Configurable Intel® Atom™-basedProcessor / K. Temple // Intel Newsroom [Electronic resource]. – 2010. – Mode of access :Processor / K. Temple // Intel Newsroom [Electronic resource]. – 2010. – Mode of access :http://newsroom.intel.com/community/intel_newsroom/blog/2010/11/22/intel-expands-customer-choicewith-first-configurable-intel-atom-based-processor. – Date of access : 13.06.2011.http://newsroom.intel.com/community/intel_newsroom/blog/2010/11/22/intel-expands-customer-choicewith-first-configurable-intel-atom-based-processor. – Date of access : 13.06.2011.Delay-Based Circuit Authentication and Applications / B. Gassend [et al.] // Applied Computing (SAC’03) : Proc. of the ACM Symp. – Melbourne, FL, USA, 2003. – P. 294–301.Delay-Based Circuit Authentication and Applications / B. Gassend [et al.] // Applied Computing (SAC’03) : Proc. of the ACM Symp. – Melbourne, FL, USA, 2003. – P. 294–301.Physical Unclonable Functions and Public-Key Crypto for FPGA IP Protection / J. GuajardoPhysical Unclonable Functions and Public-Key Crypto for FPGA IP Protection / J. Guajardo[et al.] // Field Programmable Logic and Applications (FPL’07) : Proc. on IEEE Int. Conf. – Amsterdam, Netherlands, 2007. – P. 189–195.[et al.] // Field Programmable Logic and Applications (FPL’07) : Proc. on IEEE Int. Conf. – Amsterdam, Netherlands, 2007. – P. 189–195.Ярмолик, В.Н. Физически неклонируемые функции / В.Н. Ярмолик, Ю.Г. Вашинко //Ярмолик, В.Н. Физически неклонируемые функции / В.Н. Ярмолик, Ю.Г. Вашинко //Информатика. – 2011. – № 2 (30). – С. 90–100.Информатика. – 2011. – № 2 (30). – С. 90–100.Suh, G.E. Physical unclonable functions for device authentication and secret key generation / G.E. Suh, S. Devadas // Design Automation Conference (DAC’07) : Proc. of 44th ACM/IEEE Conf. – San Diego, CA, USA, 2007. – P. 9–14.Suh, G.E. Physical unclonable functions for device authentication and secret key generation / G.E. Suh, S. Devadas // Design Automation Conference (DAC’07) : Proc. of 44th ACM/IEEE Conf. – San Diego, CA, USA, 2007. – P. 9–14.A Large Scale Characterization of RO-PUF / A. Maiti [et al.] // Hardware-Oriented SecurityA Large Scale Characterization of RO-PUF / A. Maiti [et al.] // Hardware-Oriented Securityand Trust (HOST’10) : Proc. on IEEE Int. Symp. – Anaheim, CA, USA, 2010. – P. 66–71.and Trust (HOST’10) : Proc. on IEEE Int. Symp. – Anaheim, CA, USA, 2010. – P. 66–71.Improving the Quality of Ring Oscillator PUFs on FPGAs / D. Merli [et al.] // EmbeddedImproving the Quality of Ring Oscillator PUFs on FPGAs / D. Merli [et al.] // EmbeddedSystems Security (WESS’10) : Proc. of the 5th Workshop. – Scottsdale, AZ, USA, 2010. – P. 190–198.Systems Security (WESS’10) : Proc. of the 5th Workshop. – Scottsdale, AZ, USA, 2010. – P. 190–198.Fine-Grained Characterization of Process Variation in FPGAs / H. Yu [et al.] // Field Programmable Technology (FPT’10) : IEEE Int. Conf. – Beijing, China, 2010. – P. 138–145.Fine-Grained Characterization of Process Variation in FPGAs / H. Yu [et al.] // Field Programmable Technology (FPT’10) : IEEE Int. Conf. – Beijing, China, 2010. – P. 138–145.An FPGA Chip Identification Generator Using Configurable Ring Oscillator / H. Yu [et al.] // Field Programmable Technology (FPT’10) : IEEE Int. Conf. – Beijing, China, 2010. – P. 312–315.An FPGA Chip Identification Generator Using Configurable Ring Oscillator / H. Yu [et al.] // Field Programmable Technology (FPT’10) : IEEE Int. Conf. – Beijing, China, 2010. – P. 312–315.Digilent Nexys2 Board Reference Manual [Electronic resource]. – Digilent Inc. – 2008. –Digilent Nexys2 Board Reference Manual [Electronic resource]. – Digilent Inc. – 2008. –Mode of access : http://digilentinc.com/Data/Products/NEXYS2/Nexys2_rm.pdf. – Date of access : 25.03.2011.Mode of access : http://digilentinc.com/Data/Products/NEXYS2/Nexys2_rm.pdf. – Date of access : 25.03.2011.Spartan-3E FPGA Family Data Sheet (DS312 (v3.8)) [Electronic resource]. – Xilinx Inc. –Spartan-3E FPGA Family Data Sheet (DS312 (v3.8)) [Electronic resource]. – Xilinx Inc. –– Mode of access : http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf. – Date– Mode of access : http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf. – Dateof access : 25.03.2011.of access : 25.03.2011.ISE WebPACK Design Software [Electronic resource]. – Mode of access :ISE WebPACK Design Software [Electronic resource]. – Mode of access :http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm. – Date of access : 14.06.2011.http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm. – Date of access : 14.06.2011.Зотов, В. Измеритель частоты цифровых сигналов, выполненный на основе микро-Зотов, В. Измеритель частоты цифровых сигналов, выполненный на основе микро-процессорного ядра семейства PicoBlaze и реализуемый на базе инструментального комплекта Spartan-3E Starter Kit фирмы Xilinx / В. Зотов // Компоненты и технологии. – 2007. – № 12. – С. 54–62.процессорного ядра семейства PicoBlaze и реализуемый на базе инструментального комплекта Spartan-3E Starter Kit фирмы Xilinx / В. Зотов // Компоненты и технологии. – 2007. – № 12. – С. 54–62.Sedcole, P. Within-die Delay Variability in 90nm FPGAs and Beyond / P. Sedcole,Sedcole, P. Within-die Delay Variability in 90nm FPGAs and Beyond / P. Sedcole,P.Y.K. Cheung // Field Programmable Technology (FPT’06) : IEEE Int. Conf. – Bangkog, 2006. –P.Y.K. Cheung // Field Programmable Technology (FPT’06) : IEEE Int. Conf. – Bangkog, 2006. –P. 97–104.P. 97–104.Drutarovsky, M. Analysis of Randomness Sources in Transition Effect Ring OscillatorDrutarovsky, M. Analysis of Randomness Sources in Transition Effect Ring Oscillatorbased TRNG / M. Drutarovsky, M. Varchola // Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi’10) : Proc. of Int. Workshop, Gif sur Yvette. – France, 2010. – P. 102–107.based TRNG / M. Drutarovsky, M. Varchola // Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi’10) : Proc. of Int. Workshop, Gif sur Yvette. – France, 2010. – P. 102–107.

The authors declare that there are no conflicts of interest present.