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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">inform</journal-id><journal-title-group><journal-title xml:lang="ru">Информатика</journal-title><trans-title-group xml:lang="en"><trans-title>Informatics</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1816-0301</issn><issn pub-type="epub">2617-6963</issn><publisher><publisher-name>UIIP NASB</publisher-name></publisher></journal-meta><article-meta><article-id custom-type="elpub" pub-id-type="custom">inform-254</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>ОБРАБОТКА СИГНАЛОВ, ИЗОБРАЖЕНИЙ, РЕЧИ, ТЕКСТА И РАСПОЗНАВАНИЕ ОБРАЗОВ</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>SIGNAL, IMAGE, SPEECH, TEXT PROCESSING AND PATTERN RECOGNITION</subject></subj-group></article-categories><title-group><article-title>СИНТЕЗ FPGA-АРХИТЕКТУР БАНКОВ ФИЛЬТРОВ НА ОСНОВЕ БЛОЧНОЙ ЛЕСТНИЧНОЙ ФАКТОРИЗАЦИИ В АЛГЕБРЕ КВАТЕРНИОНОВ (ЧАСТЬ 1)</article-title><trans-title-group xml:lang="en"><trans-title>SYNTHESIS OF FPGA ARCHITECTURES OF BLOCK LIFTING-BASED FILTER BANKS IN QUATERNION ALGEBRA (PART 1)</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0001-5807-8685</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Рыбенков</surname><given-names>Е. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Rybenkov</surname><given-names>E. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ассистент кафедры электронно-вычислительных систем</p></bio><bio xml:lang="en"><p>Assistant Professor, Department of Computer Engineering</p></bio><email xlink:type="simple">rybenkov@bsuir.by</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Петровский</surname><given-names>Н. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Petrovsky</surname><given-names>N. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>доцент кафедры электронно-вычислительных систем,</p></bio><bio xml:lang="en"><p>Associate Professor, Ph. D. (Computer Science), Department of Computer Engineering</p></bio><email xlink:type="simple">nick.petrovsky@bsuir.by</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Белорусский государственный университет информатики и радиоэлектроники</institution><country>Беларусь</country></aff><aff xml:lang="en"><institution>Belarusian State University of Informatics and Radioelectronics, Minsk</institution><country>Belarus</country></aff></aff-alternatives><pub-date pub-type="collection"><year>2018</year></pub-date><pub-date pub-type="epub"><day>16</day><month>06</month><year>2018</year></pub-date><volume>15</volume><issue>2</issue><fpage>29</fpage><lpage>44</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Рыбенков Е.В., Петровский Н.А., 2018</copyright-statement><copyright-year>2018</copyright-year><copyright-holder xml:lang="ru">Рыбенков Е.В., Петровский Н.А.</copyright-holder><copyright-holder xml:lang="en">Rybenkov E.V., Petrovsky N.A.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://inf.grid.by/jour/article/view/254">https://inf.grid.by/jour/article/view/254</self-uri><abstract><p>В настоящее время методологии проектирования систем на кристалле основываются на высокопараметризированных IP-компонентах (IP – intellectual property), которые для конкретного целевого приложения обеспечивают широкий диапазон регулировки затрат ресурсов, форматов данных арифметики с фиксированной запятой и производительности системы. В статье представлен систематический подход к синтезу FPGA-архитектур целочисленных обратимых параунитарных банков фильтров в алгебре кватернионов (Int-Q-ПУБФ) для трансформационного кодирования изображений по схеме L2L (lossless-to-lossy). Показывается, что базовым элементарным преобразованием банка фильтров является операция умножения кватернионов (Q-MUL). Блочная лестничная факторизация данной операции и распределенная арифметика на сумматорах положены в основу параметризируемого Q-MUL IP-компонента.</p></abstract><trans-abstract xml:lang="en"><p>Nowadays the methodology for designing systems on a chip is based on highly parameterized IP components which provide a wide range of adjustment of costs in resources, fixed point arithmetic data formats and system performance for a specific target application. The article presents a systematic approach for synthesizing FPGA architectures of integer reversible paraunitary filter banks in quaternion algebra (Int-Q-PUBB) for L2L (lossless-to-lossy) image transformed encoding. It is shown that the basic elementary transformation of the filter bank is the operation of quaternion multiplication (Q-MUL), the block-lifting factorization of which and the distributed arithmetic on the adder are the basis of the parametrizable Q-MUL IP-component.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>схема lossless-to-lossy</kwd><kwd>кватернионы</kwd><kwd>компрессия изображений</kwd><kwd>FPGA</kwd><kwd>банк фильтров</kwd><kwd>блочная лестничная факторизация</kwd></kwd-group><kwd-group xml:lang="en"><kwd>lossless-to-lossy</kwd><kwd>quaternions</kwd><kwd>image compression</kwd><kwd>FPGA</kwd><kwd>filter bank</kwd><kwd>block-lifting factorization</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Rao, K. Techniques and Standards for Image, Video, and Audio Coding / K. Rao, J. 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